Our Sponsors

We would like to express our gratitude to the following sponsors for their generous support of ATS 2026.



Call for Sponsorships


Dear Industry Partners,

The 35th IEEE Asian Test Symposium (ATS 2026) will be held from December 1 to December 3, 2026, at Hotel Nikko Kaohsiung, Taiwan.

The IEEE Asian Test Symposium (ATS) is a long-established international conference sponsored by IEEE, with a history of more than three decades. It is widely recognized as one of the most influential international forums in Asia in the areas of integrated circuit (IC) testing, design-for-testability (DFT), reliability, system validation, AI and high-performance computing system testing, and hardware security.

With the rapid advancement of advanced process technologies, heterogeneous integration, AI chips, and increasingly complex systems, testing and verification technologies have become indispensable components of the semiconductor industry. ATS has long been committed to establishing a high-level technical exchange platform that bridges industry, academia, and research institutions. Through keynote speeches, technical paper presentations, and focused technical forums, ATS brings together leading experts and industry leaders from around the world to discuss state-of-the-art research results and future technology directions.

Over the years, ATS has consistently attracted researchers and industry professionals from Europe, the United States, Japan, Korea, and across Asia. Its technical scope closely aligns with the core interests of major semiconductor manufacturing and packaging/testing companies such as TSMC and ASE, as well as leading global EDA companies, and has therefore received long-standing support and active participation from the international semiconductor industry.

ATS 2026 will continue to uphold its strong international positioning and high technical standards. The symposium will cover a broad range of topics, including but not limited to:

Topics — Original papers on, but not limited to, the following areas are invited:

  • AI test and Test for AI
  • Analog/Mixed-Signal Test
  • ATE Design
  • Automatic Test Pattern Generation (ATPG)
  • Autonomous Testing
  • Board-Level Testing and Diagnosis
  • Boundary Scan Test
  • Built-In Self-Test (BIST)
  • CPU/GPU Test
  • Connectivity Testing
  • Defect-Based Test
  • Delay and Performance Test
  • Dependability and Functional Safety
  • Design Verification, Validation, and Debug
  • Design for Testability (DFT)
  • Diagnosis and Silicon Debug
  • Fault Diagnosis and Failure Analysis
  • Fault Modeling and Simulation
  • Fault Tolerance
  • Hardware Oriented Security and Trust
  • High-Speed I/O Test
  • Heterogeneous Testing
  • Low-Power IC Test
  • Machine Learning in Test
  • Memory Test, Diagnosis, and Repair
  • Multi-/Many-core Processor Test
  • Online Test
  • On-Chip Measurement
  • Power/Thermal/Reliability Issues in Test
  • Reconfigurable System Test
  • Reliability and Testing for Emerging/Approximate/Quantum Computing
  • RF Test
  • Safety and Test for Automotive ICs
  • Self-Repair
  • SiP, Chiplet, 2.5D and 3D IC Test
  • Software Test and Reliability
  • Standards in Test
  • System-on-Chip Test
  • Test Compression
  • Test Economics
  • Test Quality
  • Test Synthesis
  • Test for Biomedical Circuits and Systems
  • Test for MEMS and Microfluidic Systems
  • Test for Nanoscale Devices and Emerging Technologies
  • Test for Reversible and Quantum Circuits
  • Test for Sensors and IoT
  • Yield Analysis, Learning, and Enhancement


Tentative Program of ATS 2026

The three-day symposium is currently planned to include the following core program components. Final details will be determined based on paper review outcomes and invited speakers.

1. Opening Ceremony & Keynote Speeches

  • Keynote addresses by internationally renowned scholars and industry leaders
  • Focus on advanced semiconductor testing, AI chips, system reliability, and emerging industry trends

2. Technical Paper Sessions

  • IC Testing and Design-for-Testability (DFT)
  • Reliability, Yield, and System-Level Testing
  • AI / Machine Learning Accelerator Testing
  • Hardware Security and Trustworthy Systems

3. Industry-Oriented Sessions / Industry Forum

  • Testing challenges in advanced process technologies and advanced packaging (including OSAT perspectives)
  • Industry case studies and best practices
  • Advances in EDA tools and system-level verification

4. Panel Discussions

  • Future directions of semiconductor testing and verification
  • Industry–academia collaboration and talent development

5. Poster Sessions & Student / Young Researcher Activities

  • Emerging research results and interactive discussions
  • Opportunities for industry engagement with young talents

For detailed information and the latest updates, please visit the official symposium website: https://www.ats2026.tw/


During the three-day symposium, ATS 2026 will actively organize diverse industry–academia interaction platforms to promote in-depth technical exchange and collaboration among participants. In this spirit, we cordially invite industry partners to support and participate in ATS 2026 through one of the three sponsorship packages designed to facilitate meaningful engagement.

Item Platinum Sponsor Gold Sponsor Silver Sponsor
Sponsorship Amount NTD 300,000 NTD 200,000 NTD 100,000
Complimentary Symposium Registrations 6 4 2
Invitation to Deliver a Keynote Speech Invited keynote opportunity
(subject to program arrangement)		 - -
Advertisement in Symposium Program Book Included Included -
Company Logo with Hyperlink on Official Website Included Included Included
Promotional Video Link on ATS Website Included - -
On-site Distribution of Promotional Materials Included Included Included
Logo Placement on Official Publications and Materials Included Included Included
International Visibility within Test & Semiconductor Community ★★★★★ ★★★★☆ ★★★☆☆


As government funding for this symposium is relatively limited, we sincerely request your organization’s generous support and sponsorship, which will be instrumental in maintaining the high quality and international impact of this important academic exchange platform. We also warmly welcome executives and colleagues from your organization to attend ATS2026 and engage directly with global experts to exchange insights on the latest technological developments.

Please accept our sincere appreciation and invitation.

We wish your organization continued success and prosperity.



Sincerely,

General Chair
Jing-Jia Liu
Department of Electrical Engineering
National Tsing Hua University

Program Chair
Tong-Yu Hsieh
Institute of Integrated Circuit Design
National Sun Yat-sen University



Organizers｜
Sponsors